ET-BASE ARM2103
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Contents |
Main features
- ARM7TDMI-S core with fast multiplier supporting 32 bit ARM and 16 bit THUMB instruction sets.
- Built in bootloader using a standard RS-232 interface. Second RS-232 interface.
- 19.6608 MHz crystal gives 58.98 MHz maximum CPU clock available from programmable on-chip phase-locked loop oscillator. Real Time Clock with 32768 Hz crystal and battery. Watchdog timer.
- 8 kB on-chip Static RAM, 32 kB on-chip Flash Program Memory
- Two 32 bit timers with 32 bit prescalers, capture and compare.
- Two 16 bit timers with 16 bit prescalers, capture and compare.
- 32 general purpose I/O lines (5 V tolerant).
- Eight channel multiplexed 10-bit A/D converter with conversion time as low as 2.5 µs.
Hints and tips
- The memory acceleration module (MAM) may be unstable in mode 2 at high frequencies or low voltages. Set it to mode 1 or 0 to be sure of correct behaviour. Increasing the core voltage from 1.8 V to 2 V helps.
- The 32x32 multiplier with the full 64 result is not available through C but can be accessed through inline assembly langauge.
- There is no division in hardware so avoid divisions in time critical code.
- There is no floating-point hardware so use fixed-point where speed is important.
Special pins
- P0.0 - Transmit → MAX3232
- P0.1 - Receive ← MAX3232
- P0.8 - Transmit → MAX3232 (Selectable by jumper)
- P0.9 - Receive ← MAX3232 (Selectable by jumper)
- P0.2 - Open drain according to Errata 1.5
- P0.3 - Open drain according to Errata 1.5
- P0.14 - Load button (22 kΩ pull-up to 3.3 V)
- P0.17 - 10 kΩ pull-up to 5 V for LCD enable (Hand soldered, depends on revision?)
- P0.27 - 100 kΩ pull-up to 3.3 V
- P0.28 - 100 kΩ pull-up to 3.3 V
- P0.29 - 100 kΩ pull-down to Gnd
- P0.30 - 100 kΩ pull-up to 3.3 V
- P0.31 - 100 kΩ pull-up to 3.3 V
Power usage
Power down does not include A/D, shut it down separately. The LED, voltage regulators and the RS-232 circuit seems to use about ?? mA. Measurements are with all busses at 60 MHz. Input voltage 5 V ± 10 %.
- Normal ?? mA
- All devices off ?? mA
- Idle ?? mA
- Power off ?? mA
A simple frequency generator
// Frequency on P0.5 = PCLK / ((T0MR0 + 1) * 2) PINSEL0 |= 2<<10; // P0.5 - Match 0.1 (TIMER0) T0EMR = 3<<6; // Toggle corresponding External Match output pin T0MR0 = 2; // Number of cycles - 1 between toggles T0MCR = 1<<1; // Reset Timer0 on MR0 match T0PC = 0; // Prescaler = 0 T0TCR = 2; // Reset Timer0 T0TCR = 1; // Start Timer0
A simple frequency counter
// Resolution is 1 Hz, maximum frequency PCLK/2 #define PCLK 58982400 // Maximum frequency while using PLL and standard crystal PINSEL0 |= 1<<21; // CAP1.0 (Timer 1) - P0.10 (counter input) T1PC = 0; // Prescaler1 = 0 T1CTCR = 1; // Counter Mode: TC is incremented on rising edges on the CAP input selected by bits 3:2. T1TCR = 2; // Reset timer1 T0PC = 0; // Prescaler0 = 0 T0TCR = 2; // Reset timer0 T0TCR = 1; // Start timer0 T1TCR = 1; // Start timer1 while(T0TC<PCLK); // Wait exactly one second frequency = T1TC;
