Hardware Description Language
From HvWiki
A hardware description language (HDL) often looks a like normal computer languages but the methodology used is quite different. In a CPU the program is executed sequentially in one area of the chip (ALU) but a HDL program would describe circuits that are running in parallel in different areas of the chip.
This means that some problems that are solved in a simple manner with a CPU may be very complex to solve in hardware and may require the implementation of a complete CPU. The opposite is even more true, some problems that are easy to solve in hardware are impossible to solve with a CPU because it lacks the parallelism needed to do several things at once in perfect sync.
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Example
A very simple example how a problem would be solved with a normal programming language:
set pin A = 1 wait 2 microseconds set pin A = 0 wait 32 microseconds
In a HDL it must be implemented with a state machine and will look something like this:
select state
case 1
pin A = 1
timer = 0
state = 2
case 2
if timer = 2 then state = 3
case 3
pin A = 0
timer = 0
state = 4
case 4
if timer = 32 then state = 1
case else
state = 1
end select
Assignments
<= operator
The <= operator is a non-blocking assignment, that means that the order of operations is irrelevant.
a <= b; b <= a;
is identical to:
b <= a; a <= b;
Both will swap a and b and will result in the same circuit. Imagine that reading a "variable" will return the result it had at the end of the previous clock cycle and not the value set by any lines above.
This will work because the order of operations are defined. Assignment will always happen after evlauation:
clk <= ~clk;
= operator
The = operator is a blocking assignment and works like in most computer languages.
a = b; b = a;
is identical to:
a = b;
This will not work because the order of operations are unknown because evaluation and assignment happens at the same time:
clk = ~clk;
